Difference between BIT_VECTOR and ARRAY OF BIT

Question

I'm starting to study VHDL for my University examination and I have a question: which is the difference between a BIT_VECTOR type and an ARRAY OF BIT?

Answer 1

As stated here

The bit_vector is a one-dimensional array type with elements being of type Bit. The bit_vector type is predefined in the Standard package. Syntax:

type bit_vector is array (natural range <>) of bit; 

This can also be found in the IEEE1076-2008 standard, section 5.3.2.3 "Predefined array types".

edit: I was not complete. bit_vector is a predefined (unconstrained) array of bit. But as a cow is an animal but not every animal is a cow, you can have more types. As VHDL is strongly typed, that means your cannot simply connect different types together without a casting function.

See the example code below:

entity e is end entity;
architecture a of e is
    signal s1 : bit_vector(0 downto 0);
    type own_bit_vector is array(natural range <>) of bit;
    signal s2 : own_bit_vector(0 downto 0);
begin
    -- next line doesn't work
    --s2 <= s1;
    -- "Error: D:/Hdl/BitVector/BitVector.vhd(7):
    --   Signal "s1" is type std.STANDARD.BIT_VECTOR;
    --   expecting type own_bit_vector."

    -- but this is allowed
    process(s1) begin
        for i in s1'range loop
            s2(i) <= s1(i);
        end loop;
    end process;
end architecture;