In x86-64 assembly I have following instruction
mov dx, word [esi-5]
Nasm 2.13.03 generates:
66 67 8B 56 FB
yasm 1.3.0 generates:
67 66 8B 56 FB
The 66 67 opcodes are modifiers so 8B 56 FB on its own is:
mov edx, dword [rsi-5]
I noticed that:
66 8B 56 FB
also evaluates to:
mov dx, word [rsi-5]
I have two questions:
1) Why nasm & yasm emit this 67 opcode byte padding? (67 on it's own is not enough to reduce edx to dx, it needs to include 66 )
2) Is there a way to emit a shorter 4 byte instruction without 67 in nasm / yasm?
The question made false assumption 66 8B 56 FB
mov dx, word [rsi-5]
is equivalent to
`66 67 8B 56 FB` or `67 66 8B 56 FB`
mov dx, word [esi-5]
66 reduces edx to dx
67 reduces [rsi-5] to [esi-5]