makefile: % pattern in prerequisite $(variable)

Question

I have something like this that works:

target1.PREREQUISITES = file11 file12 file13
target2.PREREQUISITES = file21 file22 file23

$(myDir)target1.sfx : $(target1.PREREQUISITES)
    <same recipe here>

$(myDir)target2.sfx : $(target2.PREREQUISITES)
    <same recipe here>

and this is what I want to do but it not working:

target1.PREREQUISITES = file11 file12 file13
target2.PREREQUISITES = file21 file22 file23

$(myDir)%.sfx : $(%.PREREQUISITES)
    <commun recipe here>

It always says that there is nothing to do because the target is up to date.

I have the feeling that the problem could be what is done in each make phase, I mean, what is done first the % or $. Should it be working just fine?

Answer 1

Thanks user657267 for your answer, it does work and it gave me a good lead. For those not too familiar with make notice the double dollar sign. I am including my answer here, however, because it still uses the % sign that was part of my original question and is working as well as yours. I am using the following solution.

.SECONDEXPANSION:

$(mydir)%.sfx: $$(%.PREREQUISITES)
    echo $^

I just noticed, and be aware of it, that when using a secondary expansion make does not tell you that a missing prerequisite has no rule, instead it displays a misleading message saying that there is no rule to make the target.