I have just started working with P1020 PowerPC IC and have my first problem. I was looking into P1020 reference manual and e500 ppc documentation and cannot find answer for my question.
How can I read 64bit value - created as two 32bit lower TBL and 32bit upper TBU registers of Time Base module - and prevent race condition? Is it guaranteed that the value will be correct (registers are latched?). Is there any assembler instruction that can read both registers in atomic way? Where I can find this kind of info in the doc? Thanks
The PowerPC architecture document has a specific section on exactly this - see section 2.2.1.2 “Reading the Time Base in 32-Bit Mode” (on page 60) of https://wiki.alcf.anl.gov/images/f/fb/PowerPC_-Assembly-_IBM_Programming_Environment_2.3.pdf .
In short: you want to read the upper portion of the timebase, then the lower, then the upper again, and compare the two reads of the upper. If they're not equal, then your reads spanned a carry, so perform all three reads again.
As the document describes in assembly:
loop:
mftbu rx # load from TBU
mftb ry # load from TBL
mftbu rz # load from TBU
cmpw rz, rx # see if ‘old’ = ‘new’
bne loop # loop if carry occurred