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vhdlfpgaadc

using internal ADC in spartan 3e 1600e fpga kit


i cant not use the ADC feature in the kit. what i did understand is that the ADC which is e LTC1407A-1 need 2 input clocks to work. one for sampling and one for receiving data from the ADC so how to do that. do i have to generate 2 clock from the fpga which is impossible or there is something that i am missing. and is there is a way to create vhdl code to make the fpga ADC?


Solution

  • do i have to generate 2 clock from the fpga

    No. I only see one clock signal: SCK

    which is impossible

    No, it is possible.

    is something that i am missing.

    Yes: Either a clock divider, or a Digital Clock Manager

    Is there is a way to create vhdl code to make the fpga ADC?

    Yes.