I am looking for HPS to FPGA custom component integrations guideline using Qsys. I have De0 nano SoC board. I am new to SoC FPGA programming. I still could not found a material or tutorial for HPS to custom VHDL or Verilog component integration. I need to get to know what are the connections that I should make and how to/ where to declare them in C code on ARM processor and the entity of the FPGA custom designed component. Can any body post some links.
I have read following tutorials from Altera. Avalon Interface Specifications pdf, ARM_A9_intro_intelfpga pdf, Intel_FPGA_Monitor_Program_ARM pdf, making qsys component pdf, Using_GIC - ARM HPS pdf, External_Bus_to_Avalon_Bridge -nios II pdf, Avalon_to_External_Bus_Bridge nios II pdf, DE0-Nano-SoC_Computer_ARM pdf.
On the FPGA side Quartus is used to instantiate the HPS as an IP Core in QSys. HPS-to-FPGA bridges can be enabled and IP connected to it. Either do it in QSys or export the bus via a bridge into a wrapper VHDL or Verilog design.
There is a QSys section in Volume 1 of the Quartus Handbook: https://www.altera.com/products/design-software/fpga-design/quartus-prime/support.html
On the HPS side, you have to generate a new Preloader from the Quartus output. You will have to write a Linux kernel driver for you device and probably create a DeviceTree entry. You can do simple tests with the mw/md commands in UBoot or Linux userspace e.g. by mmapping /dev/mem.
RocketBoards.org is a great resource. Your board is compatible with Atlas-SoC Development Platform: https://rocketboards.org/foswiki/view/Documentation/AtlasSoCDevelopmentPlatform#Getting_Started