Is data loaded into the cache aligned to the cache line size?

Question

Let's say that the cache line size is 64 bytes and that I have an object whose size is also 64 bytes. If this object is accessed, will it be:

1. All loaded into one cache line
2. Only the part between the start of the object and the next multiple of 64 bytes will be loaded
3. The object will be loaded into two different cache lines
4. Something else

I have a feeling that the answer differs from processor to processor, but what is the most likely outcome on modern CPU's?

Answer 1

When it comes to machine instruction level, concept of objects that are available in higher level languages disappears. Accessing their members through higher level assignment operations will be translated to regular read and write instructions. So if the runtime system, or the virtual machine of the language is smart and able to allocate objects to gain better cache utilization, in your case, into 64 byte aligned addresses, when the higher level language reads any member of the object, which could be anywhere within the 64 byte aligned address, the entire object will be loaded to the cacheline (because its allocated at 64 byte aligned address). If the runtime system is dumb, if it just allocates objects as requested in the flow of the program, without looking into situations (64 byte objects and 64 byte cache lines) as mentioned in your question, then when a read happens to a member of the object, data at the 64 byte aligned address of that member will be loaded into the cache. Therefore in the latter case you need to be either lucky or write code such that special padding is in place, either front or back of the object to make it cache line aligned.