Do CPUs (specifically powerpc) allow an interrupt handler to be installed for IPIs (inter processor interrupts) ? The MPIC I am using supports 4 IPIs per core and it has registers for setting the vector and priority of these IPIs, but where should I install the interrupt handler ? The CPU core has IVORs (Interrupt Vector Offset Registers) for setting interrupt handlers for external interrupt, internal interrupt, timer interrupts, exceptions, etc, but nothing for IPIs.
IPIs come in on the EE vector. You have to find from the MPIC why you got interrupted, in the EE exception handler.