since I have no luck with my question on arm community (see here), I also ask you the following question.
I am writing a OS targeted to ARM v7 processors, and I load executable in ELF32 format. If the LSB of the entry point address is set, it means that the entry point should be executed in Thumb mode. My question is to know whether a movs pc, lr will update the CPSR.T bit if the LSB of lr is set, or if I should first set SPSR.T bit by hand prior to performing my return from exception using movs pc, lr.
EDIT: to be 100% clear, my question is about the very first scheduling of an application which entry point is in Thumb. There is no "old state" to return to.
The thing with initial entry to a lower exception level is that it's not actually any different from the normal case - sure, you haven't actually taken an exception, but in order to "return" you simply make things look exactly as if you had.
The LR on exception entry is a straight copy of the PC at the time (minus any preferred return address offset) thus the lsb would never be set - interworking only applies to branches, and exception entry/return is not a branch. If you'd taken an exception whilst executing Thumb code, the LR value would be the real halfword-aligned instruction address, and SPSR.T would be set, so that's the state you need to construct.