I've recently come across an instruction called tlbiel
and I'm curious as to what it means and what purpose it serves. After doing some intense Google searching, I saw one IBM document that lead me to believe it's hypervisor-related. The current instruction that I'm facing is tlbiel r3, 1
and after studying the opcode (0x7C201A24
), I've come to the conclusion that it roughly translates to mtspr 3, 1
; the only difference being that the expected value of 467 at 21 - 30 in mtspr's opcode has changed to 274. However, before tlbiel gets executed, instructions li r3, 0x3FF
& sldi r3, r3, 32
are introduced directly before, causing r3 to contain 0x00003FF000000000
.
As far as I know, there's no SPR with the value of 3 and there's no real documentation on tlbiel at all (that I can find). What does this instruction accomplish?
tlbiel
is "TLB Invalidate Entry Local": it invalidates an entry in the TLB [Translation Look-aside Buffer]. As comments on the question surmised, it is related to a regular TLB invalidate, but it is "local" in that it only invalidates TLB entries on the thread executing the tlbiel
instruction.
For more details, the usual source is the Power ISA. It explains the instruction in very fine detail, including what it does with the register that you specify.
There are a few versions of the ISA floating around. The two that are easiest to find are:
You will need to sign up for an IBM ID to download the files, but they are free. If you're doing assembler level development on a PowerPC chip they are absolutely invaluable resources.
A couple of final things:
tlbiel
is sufficient and when a non-local version is required.