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makefile

Break long dependencies in Makefile into several lines

target: TargetA ../DirB/FileB.cpp ../DirC/FileC.o ../DirD/FileD.o ...

This is a long line in a make file. Is it possible to break this into several lines?

Solution

  • There are a couple ways of doing this. One simple way:

    # example 1

target: targetA targetB
target: targetC targetD

target:
    @echo $@ is dependent on $?

    Note that this will not work with pattern rules through (rules with % in the targets/dependencies). If you are using pattern rules (and even if you're not), you can consider doing something like:

    # example 2

TARGET_DEPS := targetA targetB
TARGET_DEPS += targetC
TARGET_DEPS += targetD

target: $(TARGET_DEPS)
   @echo $@ is dependent on $?

    While it's possible to use the backslash, I personally find this makes the makefiles harder to read as the meaning of the indentation becomes unclear.