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assemblyarmcortex-m

ARM assembly in NXP LPC1768


I want to write assembly for LPC1768 but I when link it doesn't run. This is my program, I want it to turn on LED.

STACK_TOP   EQU     0x10008000  
AREA | Header Code |,CODE
DCD STACK_TOP
DCD START
ENTRY

START

MOV R0,#0XFF
LDR R1,=0x2009C040
STRB R0,[R1]

MOV R0,#0XFF
LDR R1,=0x2009C054
STRB R0,[R1]

deadloop
B deadloop

END

I use these commands:

armasm --cpu cortex-m3 -o lamp.o lamp.s 
armlink --rw_base 0x10000000 --ro_base 0x0 --map -o lamp.elf lamp.o 
fromelf --bin --output lamp.bin lamp.elf 

Solution

  • So first off, what does the disassembly look like? Did it correctly generate the vector table 32 bit stack address, then 32 bit start address orred with 1 (lsbit set)? That of course assumes that you are loading this into flash and not running from ram, if from ram then you want to do something different most likely or know the offset to the entry point.

    you are setting all of the port2 pins to an output. and then setting them high.

    Is your led configured such that a high turns it on or a high turns it off? (should be gpio, led, resistor and then either vcc or ground, for a high to turn it on the it should be ground. If it is vcc, then you want to set the port pin low). (doesnt matter which order the components are resistor then led or led then resistor).

    My guess is you didnt read:

    Criterion for Valid User Code

    The reserved Cortex-M3 exception vector location 7 (offset 0x 001C in the vector table) should contain the 2’s complement of the check-sum of table entries 0 through 6. This causes the checksum of the first 8 table entries to be 0. The boot loader code checksums the first 8 locations in sector 0 of the flash. If the result is 0, then execution control is transferred to the user code. ...

    in the datasheet?

    Hmmm, or you did want to run this from ram? You would need to set your ro address to 0x10000xxx (see below), and you wouldnt want the vector table.

    The datasheet also says:

    RAM used by ISP command handler

    ISP commands use on-chip RAM from 0x1000 0118 to 0x1000 01FF. The user could use this area, but the contents may be lost upon reset. Flash programming commands use the top 32 bytes of on-chip RAM. The stack is located at RAM top - 32. The maximum stack usage is 256 bytes and it grows downwards.

    So you will see folks often reserve 0x200 bytes for the bootloader basically when using it. So start at 0x10000200 instead of 0x10000000. for some reason I am more generous I use 0x10000800. Some folks reserve that 0x200 bytes all the time even if they arent using the ISP tools.

    I assume from your ro address and rw address and vector table you are wanting to run from flash. you need to get the checksum in there, and I recommend disassembling to see that the vector table has an odd address for start. you probably want to put a few other vectors in there to deadloop to fill in the space to the checksum.