I am currently working with VGA in Vivado on a Basys3 FPGA and I am having some issues. I want to generate different images (test mires). I have a separate .vhd file for each of these images, and a top level file where I would like to use a multiplexer for these images in order to assign each of them to a separate switch. My question is: How do I assign an image to a switch, if the outputs from every .vhd file are the three colour signals RGB?
What I tried is that I named these 3 output signals differently for every image, and assigned them to the final output signal when a switch is on using a case structure. I will paste part of it so you guys can get the idea:
This is the top entity
entity VGAdraw is
Port ( CLK : in STD_LOGIC;
cntHor : in integer range 0 to cstHorTotSize - 1;
cntVer : in integer range 0 to cstVerTotSize - 1;
SW : in STD_LOGIC_VECTOR (15 downto 0);
LED : out STD_LOGIC_VECTOR (15 downto 0);
RED : out STD_LOGIC_VECTOR (3 downto 0);
GREEN : out STD_LOGIC_VECTOR (3 downto 0);
BLUE : out STD_LOGIC_VECTOR (3 downto 0)
);
end VGAdraw;
This is one of the images:
signal red5, green5, blue5, red7, green7, blue7: STD_LOGIC_VECTOR (3 downto 0);
component Checkers is
Port ( CLK : in STD_LOGIC;
cntHor : in integer range 0 to cstHorTotSize - 1;
cntVer : in integer range 0 to cstVerTotSize - 1;
red7 : out STD_LOGIC_VECTOR (3 downto 0);
green7 : out STD_LOGIC_VECTOR (3 downto 0);
blue7 : out STD_LOGIC_VECTOR (3 downto 0)
);
end component;
component Checkers
port map (CLK => CLK,
cntHor => cntHor,
cntVer => cntVer,
red7 => RED,
green7 => GREEN,
blue7 => BLUE
);
The case structure
process
begin
case SW is
when "0000000000100000" => RED <= red7;
GREEN <= green7;
BLUE <= blue7;
when others => RED <= red5;
GREEN <= green5;
BLUE <= blue5;
end case;
end process;
The VGADraw is the top entity, in which I have declared each image as a different component. Like the one above. How do I assign each of them to a switch on my FPGA board, so i can change to the image I want by turning on a Switch? I have also tried some 'if generate' statements, with no results. Like in this case, having 16 switches on the Basys3, by turning on sw5, I would like to get the image drawn by the Checkers component.
Thanks for any help.
Just above the process starts your code should be something like this:
signal red1, blue1, green1, red7, green7, blue7 red5, green5, blue5 : STD_LOCIC_VECTOR(3 downto 0);
In general, when making a Structural design, after finishing with components you should declare the signals you need as given above.