Difference between privilege level & exception level

Question

The ARM architecture provides 3 privilege levels PL0 to PL2. While going through other documentation I found exception levels EL0 to EL3.

What is the difference between privilege level & exception level.

Or both are same.

Answer 1

Historically, the opposite of Privilege is User, and User always corresponds to EL0. This is the level corresponding to EL0. In first ARM core, only the equivalent of EL0 and EL1 were defined. The difference is mostly that EL0 does not have access to system registers (Exceptions, program the MMU, etc.) which are reserved to EL1.

Now the recent cores define 2 additional level which have more privilege, ie more and more system registers available:

• EL2 corresponds to the Hypervisor, which can define virtual machines. A virtual machine generally runs in EL1 and is generally an OS (Linux, Windows, etc.)
• EL3 is the level above which is called Monitor Mode. This extra level is used to run security applications (Trustzone).

So in summary EL3 has access to all registers and has full control of the CPU, while EL0 is the one which has the less control, and runs applications.