So consider that the Global Interrupt is disabled and now a timer or any other Maskable Interrupt comes, this wont be serviced. But does it set its respective Flag? And would it be serviced later when I re-enable the Global Interrupt?
By this I mean to ask does the interrupt bit get set to 1 from 0 while global interrupt is disabled??
Or is this architecture specific where in some architectures hold the Interrupt state at Global interrupt disable and service them on re-enabling and some architectures just miss them!
This is somewhat MCU specific, but generally the global interrupt mask just prevents the interrupt from getting executed. The global interrupt mask is located in the CPU core (usually inside a condition code register), while the interrupt source flag register and the interrupt enable register are located in the hardware peripheral.
You have a hardware flag register which sets its flags independently of a hardware interrupt enable register, that tells what flags in the flag register that should yield interrupts. And the interrupt enable register is in turn independent of the global interrupt mask.
Therefore the hardware peripheral that generated the interrupt will still set the flag that triggered the interrupt, no matter if that flag will trigger an interrupt or not. Usually that very same flag can be used for polling the hardware, instead of using an interrupt. So it needs to work if interrupts are disabled.