MyHDL: Object type is not supported in this context

Question

I'm trying to convert this code to Verilog:

from myhdl import always_comb
from myhdl import modbv
from myhdl import Signal
from myhdl import concat
from myhdl import toVerilog

var0 = modbv(15)[12:]
var1 = modbv(15)[12:]
var2 = modbv(15)[12:]
var3 = modbv(15)[12:]
a = modbv(0)[3:]
b = modbv(1)[3:]
c = modbv(2)[3:]
d = modbv(3)[3:]
e = concat(d, c, b, a)


def qwe(sel, out_data):
    @always_comb
    def hdl():
        if sel == a:
            out_data.next = var0
        elif sel == b:
            out_data.next = var1
        elif sel == c:
            out_data.next = var2
        elif sel == d:
            out_data.next = var3
        else:
            out_data.next = e

    return hdl


sel = Signal(modbv(0)[3:])
output = Signal(modbv(0)[12:])

toVerilog(qwe, sel, output)

however, i got the following error:

  File "/usr/lib/python3.5/site-packages/myhdl/conversion/_toVerilog.py", line 474, in raiseError
    raise ToVerilogError(kind, msg, info)
myhdl.ToVerilogError: in file test.py, line 22:
    Object type is not supported in this context: a, <class 'myhdl._modbv.modbv'>

Moving the variables inside the qwe function will work, but I need those variables outside because I need to access those 'constants' in another module.

Can anyone explain why I got this error, and how can I make it work?

Thanks.

Answer 1

You have to use Signals to communicate between modules. Generators can only be sensitive to Signals. In particular, the sensitivity list that the always_comb decorator infers only contains Signals.

BTW, I am puzzled why you refer to "constants". If you need constants, just use plain ints. Types like intbv and modbv are mutable types, and not intended to represent constants.