bit_vector bounds violation by static constant

Question

Posting this question on SO and not EE is because I am struggling with coding/software imperfections.

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I am new to VHDL and going through "Free range VHDL" book. Playing around with bit_vector I found out that to access single wire in a bus syntax is following bus_name(0) (0 is just for example).

Keeping that in mind I wrote simple representation of 4 input multiplexer.

library ieee;
use ieee.std_logic_1164.all;

entity Multiplexer4_1 is
port
(   
    data    : in bit_vector(3 to 0);
    selector    : in bit_vector(1 to 0);
    output  : out bit
);
end entity Multiplexer4_1;

architecture m4_1 of Multiplexer4_1 is
begin
    output <= data(3) when (selector = "11") else
        data(2) when (selector = "10") else
        data(1) when (selector = "01") else
        data(0) when (selector = "00") else
        '0';
end architecture m4_1;

I am using ghdl to process VHDL under linux with the following command.

ghdl -a 4Multiplexer.vhdl

As a result I receive 4 error messages evidently because of data(0), data(1) and others, that are listed below.

4Multiplexer.vhdl:15:23: static constant violates bounds
4Multiplexer.vhdl:16:21: static constant violates bounds
4Multiplexer.vhdl:17:21: static constant violates bounds
4Multiplexer.vhdl:18:21: static constant violates bounds
ghdl: compilation error

The questions are:

• How to solve that problem?
• If bus_name(index) is a right syntax for that?

---

Update:

Not to make the same error I've made it's crucial to understand how arrays/ranges work in VHDL.

• Difference between to and downto
• VHDL constructs (arrays mentioned there)

Thanks for help!

Answer 1

The problem is with declaration.

You have defined data and selector as

data    : in bit_vector(3 to 0);
    selector    : in bit_vector(1 to 0);

You should define it either as

data    : in bit_vector(3 downto 0);
selector    : in bit_vector(1 downto 0);

or

data    : in bit_vector(0 to 3);
selector    : in bit_vector(0 to 1);

Difference between to and downto:

The link already explains difference between to and downto. Any difference of "downto" and "to" appears when we want to use a bit-vector not just to represent an array of bits, where each bit has an independent behavior, but to represent an integer number. Then, there is a difference in bit significance, because of the way numbers are processed by circuits like adders, multipliers, etc. I will give one more example

Lets say you want to assign your bit vector value = "0001" if using "3 downto 0", assignment will be

data<=(0 => '1', others => '0')

and in "0 to 3" case, assignment will be

data<=(3=>'1',others => '0')

Importantly, one should always stick to either ascending or descending range. Programmer can use combination of both. However, it may be confusing and can throw some errors. Also, as far as I know, most buses are numbered using descending range. Hence, programmers favour descending range.