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fpgaxilinxamba

Custom IP over an AXI bus


I have a Xilinx Zybo board. I followed the instructions here and created a custom multiplier over the AXI bus. The multiplier shown on the website processes one input and generates one output. How can I modify it such that it can process streaming inputs sort of like a pipeline. Any hints?


Solution

  • In the tutorial, at Step 5 of "Create the custom IP", select AXI Stream interface rather than AXI Lite. Then modify the HDL source to have the proper signals for a streaming interface (mainly VALID, READY, and DATA). Then follow the rest of the steps to add the IP into your design in Vivado.

    Note you'll have to create 2 streaming interfaces, one for input and one for output. Unlike AXI Lite where you can read/write a single register, a Stream is a one-directional flow of data.

    EDIT: this doesn't address the way you'd test/stim from the SW side. The example will only work with an AXI Lite interface. You'd need a custom driver to work with the Streaming IF(s)