I am trying to get RA5 as digital output. But it does not seem to work. I went through the datasheet and found RA0, RA1 and RA3 are input only. That means RA5 supports both input and output, am I right? Why I can't get RA5 to output digital 1?
void main() {
ANSELA = 0x00; // PORTA digital setup
ANSELC = 0x00; // PORTC digital setup
TRISA = 0x00; // PORTA all outputs
TRISC = 0x00; // PORTC all outputs
LATA = 0xFF; // PORTA all high
LATC = 0xFF; // PORTC all high
while (1) {
}
}
I copied configuration bits from my other project as @Roger suggested.
Having below configuration bits solved the matter.
// CONFIG1
#pragma config FOSC = INTOSC // Oscillator Selection Bits (INTOSC oscillator: I/O function on CLKIN pin)
#pragma config WDTE = OFF // Watchdog Timer Enable (WDT disabled)
#pragma config PWRTE = OFF // Power-up Timer Enable (PWRT disabled)
#pragma config MCLRE = OFF // MCLR Pin Function Select (MCLR/VPP pin function is Digital Input)
#pragma config CP = OFF // Flash Program Memory Code Protection (Program memory code protection is disabled)
#pragma config BOREN = ON // Brown-out Reset Enable (Brown-out Reset enabled)
#pragma config CLKOUTEN = OFF // Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin)
#pragma config IESO = OFF // Internal/External Switchover Mode (Internal/External Switchover Mode is enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is enabled)
// CONFIG2
#pragma config WRT = OFF // Flash Memory Self-Write Protection (Write protection off)
#pragma config CPUDIV = NOCLKDIV // CPU System Clock Selection Bit (CPU system clock divided by 6)
#pragma config USBLSCLK = 48MHz // USB Low SPeed Clock Selection bit (System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.)
#pragma config PLLMULT = 4x // PLL Multipler Selection Bit (3x Output Frequency Selected)
#pragma config PLLEN = ENABLED // PLL Enable Bit (3x or 4x PLL Enabled)
#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset)
#pragma config BORV = LO // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.)
#pragma config LPBOR = OFF // Low-Power Brown Out Reset (Low-Power BOR is disabled)
#pragma config LVP = OFF // Low-Voltage Programming Enable (Low-voltage programming enabled)