I'm trying to declare an unsigned array in a package so that I can use the same type of array across all of my components. I declared it in the top-level component first, and then used the work library and use command to call on the package in each component. I receive a warning that says
WARNING:ProjectMgmt:454 - File circular dependency detected using rule: define-before-use.
I also receive an error that says
Line 27: Cannot find
<test2>in library<work>. Please ensure that the library was compiled, and that a library and a use clause are present in the VHDL file.
Why is there circular dependency, and am I creating and using the package correctly?
Top-Level Component
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
package pkg is
type array_unsigned is array (99 downto 0) of UNSIGNED(7 downto 0);
end package;
package body pkg is
end package body;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
library work;
use work.pkg.ALL;
entity test1 is
end test1;
architecture Behavioral of test1 is
signal input : array_unsigned;
begin
sub: entity work.test2(Behavioral)
port map(input=>input);
end Behavioral;
Lower-level Component
library IEEE;
library work;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use work.pkg.ALL;
entity test2 is
Port (input : in array_unsigned);
end test2;
architecture Behavioral of test2 is
begin
end Behavioral;
The problem is not that the first file contains both pkg package and test1 entity. This is fine and not a circular dependency. Many, including myself, might consider it a bad practice though. The real problem is that test1 instantiates test2 entity from a separate file which also uses pkg. Thus the circular dependency where test2 depends on pkg but the file containing pkg and test1 depends on test2 because it was instantiated there.
Modelsim supports compiling only specific design units within a file so it might be able to handle the situation.