Modelsim displaysCase statement choices cover only 4 out of 81 cases for my ethernet frame generation code I am getting this error after execution of my very long program in VHDL.It comprises of many case statements and case within case statements as well and of course many WHEN statements.However its said that When others => can be used only at the last statement of the code to avoid this particular error however there are many when statements used in the program.How to solve this issue?
When others => can be used at the last statement of each CASE statement, NOT just at the end of the code.
As Jeff says, without seeing your code there's not a whole lot more to say.
However, since you are covering 2 ** 2 cases out of 9 ** 2 I could make a wild guess you are covering all the '0' and '1' cases of a 2-bit std_logic_vector and ignoring all the metavalues. In which case you could replace
case my_slv is
with
case to_01(my_slv) is ...
and guarantee the metavalues are resolved to '0' or '1', but this sweeps all sorts of errors under the rug.
Far better to write an explicit test for any metavalues in the case statement. This will bring your simulations to a halt until you fix the real problem.
case my_slv is
when "00" => ...
...
when "11" => ...
when others => report "Unreachable!" severity FAILURE;
end case;