Does ARM DS-5 support cycle accurate trace for A57 targets?

Is it possible to enable cycle accurate trace collection when using the ARM DS-5 debugger for Cortex-A57 targets? I have used this feature in the past with Cortex-A9 targets, but the button to enable this feature does not seem to be available with A57.

I'm using ARM DS-5 version 5.22.0 and have been spending time going through the DTSL configuration, but have not found anything yet that would allow me to enable this functionality.

Trace data collection is working with both internal and external trace buffers, but without the cycle accurate capability, it's not possible to see the impact of device access latencies.

Solution

Does A57 support cycle-accurate trace? YES

Source:

Infocenter Document
Document : "ARM® Cortex®-A57 MPCore Processor Technical Reference Manual"
Section: "Embedded Trace Macrocell > ETM trace generation options and resources"
"Support for cycle counting in the instruction trace" => "Implemented"

Note: As usual for ETMv4 / PTM trace, it only counts the cycles between branches/waypoints, not individual instructions.