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MIPS: Does a load word create a data hazard if an instruction loads from the same register?

Does a load word create a data hazard if a subsequent instruction loads from the same register? I have

lw $t0 0($t1)
addi $s0, $t1, 4

Would this create a data hazard, since you need what is stored in the register for both operations? What if the instructions are reversed or there is an offset?

Solution

  • No. In general, register reads do not create hazards. In this case if $t1 was read by the lw, then it can be read by the next instruction without a pipeline stall/hazard.