Assume TLB hit ratio is 90%, physical memory access takes 100ns, TLB access takes 20 ns, compute the effective access time for a processor that uses two level page tables, and parallel TLB and page table indexing.
This was my formula:
(H)(TLB access time + mem access time) + (1-H)(TLB access + PT access + mem access)
This was my calculation:
EAT = [(.90) * (100ns + 20ns) + (1-.90)(20ns + 100ns*2 + 100ns)] = 130ns
I understand 2* 100ns because of the two-level page table, my confusion was when my professor said the TLB access time 20ns should not be included within the miss calculation.
Could someone please explain the reasoning behind this?
The TLB and PT indexing is assumed to be "parallel". So lookup for TLB and PT are simultaneous.
Upon memory lookup, the processor launches both a PT and TLB query. If the TLB has an answer, it will answer first; that's hit case. If not, the query will continue to run until the PT answers; that's the non-hit case.
The thing of importance is that the PT has already started to look the answer up during the time the TLB determines it cannot answer. So the TLB lookup time should not be taken into account upon a cache miss.