Search code examples
arraysvhdlreset

What is the best way to reset an array of integers in vhdl?

I'm fairly new to vhdl and I don't find a good solution to this trivial-looking problem. I'm looking for a good way to reset an integer array.

type integer_vector is array (0 to N) of integer;
...
process(...)
variable tab: integer_vector;
...
if reset = '1' then
 tab := ??

Is there something similar to tab <= (others=>(others=>'0')) which works for std_logic_vector? I don't want to use a for-loop since the synthesis doesn't support this.

Solution

  • Morten's code looks OK, so please mention the synthesis tool and version which reports this. Some synthesis tools may be too primitive to accept this code : in other cases there may be synthesis options to turn on the necessary behaviour. (Also check you followed his instructions precisely : (others => 0); asks for integers, while (others => '0'); asks for bits).

    However, for synthesis, note two things:
    (a) ranged integers would be better; it's trying to generate 32-bit integers (though later stages of synthesis may trim them)

    So for example.

    subtype my_int is natural range 0 to 99; -- needs 7 bits
type my_int_vector is array ( 0 to N) of my_int;

    may yield smaller hardware, and certainly makes it clear to the reader that smaller integers are expected.

    (b) in order to reset the entire array in a single operation it'll need to implement the whole lot in registers, which can produce a huge piece of hardware.

    If you arrange to reset one location per clock cycle (usually in a state machine), with a counter indexing through the whole array, then the array can be implemented as a block memory, saving a lot of space.