Please note that this is not a duplicate of the other questions named generic makefile.
I have followed all of the instructions on other questions about generic makefiles, and this is the code I have come up with from that:
CFLAGS = -c
CC = cc
SOURCES = $(wildcard *.cc)
OBJECTS = $(patsubst %.cc,%.o,%(SOURCES))
EXEC = run
all: build clean
build: $(OBJECTS)
$(CC) $(OBJECTS) -o $(EXEC)
%.o: %.cc
$(CC) $(CFLAGS) $<
clean:
rm *.o
However, when I execute make with a file called test.cc in my directory, it gives me the followig error:
cc -o run
cc: error: no input files
*** Error code 1
Stop.
make: stopped in /somewhere
Please note that I am on FreeBSD and the make and cc commands are the ones which come with the OS.
The lines
SOURCES = $(wildcard *.cc)
OBJECTS = $(patsubst %.cc,%.o,%(SOURCES))
are GNU make syntax, not understood by FreeBSD's make, which has its own dialect (specifically $(wildcard) and $(patsubst)). If you need to write makefiles portable to many systems, either require gmake to exist and use GNUmakefiles, or stick to the features of POSIX make.
You can install GNU make (gmake) on FreeBSD with
cd /usr/ports/devel/gmake
make install clean