Gnu Make: how to handle sub-projects

Question

ProjFolder
 \ 
  Subfolder
    sources.cpp
    makefile
makefile

Subfolder is supposed to be a separate external repo, pulled in when checking out the project. When I call make all to the top-level makefile, the following recipes get executed:

all:  $(NAME).elf $(NAME).s19 $(NAME).hex

$(NAME).elf: $(OBJECTS) $(LDSCRIPT) Subfolder/lib.a
    make -C CppAudioPeriphs all
    @ echo "...linking"
    $(CC) $(OBJECTS) Subfolder/lib.a $(LDFLAGS) $(LIBS) -o $@

As you can see, if the final product of Subfolder - the file lib.a is changed, the Subfolder makefile gets called in order to remake it, and then all product get linked into the final flash image.

The problem is the order. I want to always first call the sub-makefile. It knows when and how to remake lib.a. And THEN check if lib.a is modified to determine if to remake $(NAME).elf.

---

Here is one solution.

.PHONY: all $(NAME).elf

This just instructs make to remake $(NAME).elf no matter what. I have used this solution in the past for tiny projects, but for the current one it is not acceptable.

Answer 1

As pointed out by MadScientist (and who better) I missed the obvious solution to this problem.

The solution is to FORCE the Subfolder/lib.a target to always be attempted. And as long as the Subfolder makefile only updates lib.a when something has changed the rest will fall out correctly.

So you want the following for your Subfolder/lib.a target. The rest can stay as-is. The trick here, as indicated before, is that you can force make to run the Subfolder/lib.a target itself but if the timestamp on Subfolder/lib.a the file doesn't change then things that list Subfolder/lib.a as a prerequisite will not need to be rebuilt.

FORCE: ;

Subfolder/lib.a: FORCE
        $(MAKE) -C $(@D) target-to-build-lib.a*