how does inout parameters be implemented?

Question

I know what the inout parameters is and how to use them. Assume that we have an inout parameter io and want to create a bidirectional static RAM such as the following code :

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

ENTITY sram IS
    port(
        clk  : IN    std_logic;
        wr   : IN    std_logic;
        io   : INOUT std_logic;
        addr : IN    INTEGER RANGE 0 TO 7
    );
END sram;

ARCHITECTURE behavioral OF sram IS
    TYPE matrix IS ARRAY (0 TO 7) OF std_logic;
    SIGNAL mem : matrix;
BEGIN
    PROCESS(clk)
    BEGIN
        IF rising_edge(clk) THEN
            IF wr = '1' THEN
                mem(addr) <= io;
            END IF;
        END IF;
    END PROCESS;
    io <= mem(addr) WHEN wr = '0' ELSE 'Z';
END behavioral;

We can create an instance of sram and write on it such as the following code :

io <= '1' WHEN wr = '1' ELSE 'Z';

Question : How can synthesis tool control the multiple assignments and judge between multiple drivers ? What hardware is implemented to do it ?

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Thanks for comments and answers ...

Answer 1

For typical FPGA and ASIC devices, implementation of tristate capabilities are only available on the IO, like for example in an Altera Arria 10 FPGA:

So for such devices, the internal RAMs are always implemented with dedicated input and output ports, thus not using any internal tristate capabilities.

Even if a RAM is connected to external IOs that support tristate, then the internal RAM block is still typically created with dedicated input and output ports, so the connection to a tristate capable pin on the device is handled through an in-out buffer with the output enable and tristate capability.

If internal design tries to use tristate capabilities or multiple drivers when this is not supported by the device, then the synthesis tool will generate and error, typically saying that multiple drivers are not supported for the same net.