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c++makefileconditional-statementsgnu

GNU make ifeq comparison not working

I am trying to have a command executed depending on the current target from a list of targets (currently only one entry in that list) before another makefile is executed.

i have this:

$(LIBS):            
ifeq ($@,libname)
        my command here
endif
        $(MAKE) -C ./lib/$@

the problem is, that the ifeq does not get executed even if the target name is correct. Using an $(info $@) shows exactly the libname but the expression is not evaluated as true. I thought maybe there is a problem with expansion of the automatic variable in a conditional so i tried using an eval like this:

$(LIBS):
        $(eval CURRENT_LIB := $@)
ifeq ($(CURRENT_LIB),libname)
        my command here
endif
        $(MAKE) -C ./lib/$@

info shows that the variable now equals exactly the libname but the ifeq does not get excuted. When i enter something like ifeq (libname,libname) it works so the statement is working, but the comparison between variable and text does not evaluate to true even if the two are equal and it should work. GNU make version is 4.1

What am i missing here?

Complete Makefile:

CC := g++
CFLAGS := -v -std=c++0x -pthread -Wall -g -O3

OBJ := mycode.o
OBJ += moreobjects.o
#more objects in here

LIBS = libname

.PHONY: libs $(LIBS)

SRC = $(OBJ:%.o=%.cpp)
DEPFILE := .depend

mytarget: libs $(OBJ)
        $(CC) $(CFLAGS) -o $@ $(OBJ)

-include $(DEPFILE)

%.o: %.cpp
        $(CC) $(CFLAGS) -c $<
        $(CC) -MM -std=c++11 $(SRC) > $(DEPFILE)

libs: $(LIBS)

$(LIBS):
        $(eval CURRENT_LIB := $@)
ifeq ($(CURRENT_LIB),libname)
        ./lib/$(CURRENT_LIB)/configure
endif
        $(MAKE) -C ./lib/$@

.PHONY: clean_all
clean_all: clean
        $(foreach dir,$(LIBS),$(MAKE) clean -C ./lib/$(dir))


.PHONY: clean
clean:
        rm -rf mytarget $(OBJ) $(DEPFILE)

Thank You very much!

Solution

  • What you are trying to do cannot work. From the documentation:

    Conditionals control what 'make' actually "sees" in the makefile, so they cannot be used to control recipes at the time of execution.

    The way I put it is that conditionals are evaluated at the time the Makefile is read. So make reads your Makefile, your conditional is false and it is removed.