Is there a way to reassign Makefile variable value inside of the target body?
What I am trying to do is to add some extra flags for debug compilation:
%.erl: %.beam
$(ERLC) $(ERLFLAGS) -o ebin $<
test: clean debug_compile_flag compile compile_test
debug_compile:
$(ERLCFLAGS) += -DTEST
So if I invoke test target I would like to clean up my environment, add some new flags (like -DTEST to the existing ones), compile the whole code once again (first sources, then test modules).
I do not want to copy/paste the code for compiling with some new flags set since there is a lot of logic put here and there.
Is there some easy way to redefine the variable value so I can reuse the existing code?
Edit: As explained by Beta in the other answer, it is possible.
No. There is no way to do this in the Makefile. You can however change the value of a variable on the make
command line. If you rewrite your Makefile as follows:
ERLCFLAGS += $(ERLCFLAGSADDED)
%.erl: %.beam
$(ERLC) $(ERLCFLAGS) -o ebin $<
test: clean compile compile_test
Then, you can invoke make to perform your tests using:
make ERLCFLAGSADDED=-DTEST test