What assembly language/architecture is this?

I came across these two documents (they are written in Italian, although code comments are in English):

They describe an assembly instruction set and syntax that I cannot recognize. For example, it says that the following C code...

int AddInt( int a, int b ) {
  int c;
  c = a + b
  return c;
}

...is equivalent to this set of assembly instructions:

AddInt  ADD     SP, #-4
        PUSH    R0
        PUSH    R1
        PUSH    R2
        PUSH    R3
        LOAD    R0, 24(SP)
        LOAD    R1, 20(SP)
        ADD     R0, R1
        STORE   24(SP), R0
        POP     R3
        POP     R2
        POP     R1
        POP     R0
        ADD     SP, #4
        RET

I have experience with the ARM, x86 and x86-64 instruction set, and know both the Intel and AT&T ASM syntaxes. However, what is described in the papers looks very new to me. Here are my thoughts on the instruction set:

The presence of instructions like SVC and B reminds me of the ARM architecture.
However there are instructions like HALT, MOVE, STORE and LOAD, which are not available in ARM, x86 and x86-64. Or, at least, they have other names on those architectures.
The document states that the architecture has only a few dozen instructions. This makes me think that it must be a very old/embedded architecture.
The document also states that the instructions perform "very simple operations" (although it does not give a definition of the word 'simple'). This also makes me think that it must be a very old/embedded architecture.
The documents cite MIPS, but MIPS looks different for many reasons. For example: the documents' BLE takes one operand, while in MIPS it takes three; MIPS has no SVC, it has syscall.
Looking on the web, I found out that it looks like an old Motorola architecture, although I was not able to find an exact correspondence with any of the Motorola architectures.

And here are my thoughts about the syntax:

Left operands are used as destinations and registers have no prefixes. This reminds me of the Intel syntax.
Operands like 20(SP) remind me of the AT&T syntax (except for the register notation).
Labels are not followed by colons.
Meta-instructions like EQU are not prefixed by a dot. They are not even presented as meta-instruction, but as real instructions.
Comments are started with !. This leads me to SPARC assembly, however SPARC is different in many ways (e.g. registers are prefixed with %).

The documents does not give the architecture any name, it does not tell the size of the registers, it does not cite any compiler or interpreter. I'm a bit perplexed and I'm starting to think that the whole architecture and syntax were invented by the author (but then, why?).

So, do you have any clue about what architecture it could be?

Solution

It is a fake processor, nobody actually built a real 32-bit processor like this. This is not unusual in education, teachers have a very different priority than chip designers do. It is an idealized processor, free of the constraints of real ones.

It is a very orthogonal design, what made you think of Motorola processors. The 68000 chip was their canonical design. It survived for quite a while, Apple and many Unix machine vendors were their biggest customers. Very rabid programmer fans as well, orthogonal designs appeal strongly to logical thinkers. But it did not survive, the 680x0 family is gone. Intel being the principal Dark Vader, a company that always focused on practical designs. Make them as fast and as compatible as possible, clean is not important since that's the C compiler writer's problem. Speed trumps Pretty any time.

Using fake processor for teaching goes back a long way. Not sure if he was first, but Donald Knuth created two fake designs that were influential. His MIX design was first, interesting today only to see what practical constraints looked like 50 years ago. Back when 6-bit bytes ruled the world and 36-bit processors were common. Replaced by his MMIX design, a fake 64-bit RISC processor. Important in the late nineties to break through boundaries. Not anymore. Compatibility is much more important, processor don't actually execute the machine code instructions anymore. They translate them, much like a .NET or Java jitter does. To an internal and undocumented micro-ops execution engine that's capable of executing multiple micro-ops at the same time, out of order where possible.

Which is way too much detail for a student ever to get exposed to in 101 Assembly class. They need to learn the basics. The concept of a stack frame (add sp, #-4), CPU registers (R0, R1 etc), passing arguments to a function, addressing modes (24(SP)). Concepts that are still very important today. Small steps are very important to get to the top of the stairs.