ARM assembly code and SVC numbering

In ARM assembly codes I can see something like these... (especially in shellcodes)

svc 0x0090003f
svc 0x001ff3bf
swi 0x0900ff0b

I know that 'svc(or swi)' is the 'supervisor call' like 'int 0x80' or 'SYSENTER' from Intel. but, how can I interpret the 'svc' numbers?? where can I get the listing of it's information?? What about thumb 'svc' instruction??

The arm instruction manual doesn't seem to be explaining these...

Can someone help me? Thank you in advance.

Solution

6.2.8. SVC handlers

An exception handler might have to determine whether the processor was in ARM or Thumb state when the exception occurred.

SVC handlers, especially, might have to read the processor state. This is done by examining the SPSR T-bit. This bit is set for Thumb state and clear for ARM state.

Both ARM and Thumb instruction sets have the SVC instruction. When calling SVCs from Thumb state, you must consider the following:

The instruction address is at lr-2, rather than lr-4.

The instruction itself is 16-bit, and so requires a halfword load, see Figure 6.3.

The SVC number is held in 8 bits instead of the 24 bits in ARM state.