Currently this code below gives me the error that the first type should be constrained! But I really need the user to specify that later! How can I go about doing this?
package mult_pack IS
type mult_array is array (natural range <>) of integer range 0 to 9;
type mult_levels is array (natural range <>) of mult_array;
END mult_pack;
I would want to fill mult_levels with type mult_array, so any pointer on this is really appreciated!
In VHDL versions before VHDL2008 it's not allowed to have an unconstrained array of an unconstrained array.
What you actually try do declare is something like type mult_levels is array (natural range<>) of natural (range<>) of integer range 0 to 9. You see that more than one dimension of the resulting type is actually unconstrained. Thus you get the error message, which indicates to reduce the number of unconstrained array dimensions to only one.
In VHDL versions before VHDL2008 this is not allowed, only one dimension of the type you define can be unconstrained. In VHDL2008 this should work though, at least in simulation and assuming the simulation program you use supports VHDL2008 (I do not know of any synthesis tool that supports the new VHDL2008 features yet).