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compiler-errorsvhdl

vhdl error: integer literal cannot have negative exponent

The Quartus compiler reports the said error message at this line

constant LIMIT : float (5 downto -27) := 1E-12;

the constant is float type, why is it treated as an integer?

This constant is used only in if-statements and is compared to another float type variable.

Solution

  • The literal 1E-12 is an integer, since the mantissa (1 before 'E') is an integer; for a real type literal type write 1.0E-12.

    But that returns a VHDL real type, and not a float as used in the VHDL float_generic_pkg package. For a float type constant use the to_float functions in the float_generic_pkg package.