wildcards in cygwin make in cmd.exe

Question

im trying to make a simple makefile that will build multiple artifacts named after subdirs of the src directory. here is my dir structure:

>find .
.
./makefile
./src
./src/binA
./src/binA/main.java
./src/binB
./src/binB/main.cpp
./src/binC
./src/binC/main.scala

and here is the makefile i am trying to use. for some reason the binary target refuses to expand its dependencies with when i use both a pattern and a wildcard in the same rule

>cat makefile
dirs    :=      $(shell find src -mindepth 1 -type d)
all:    $(dirs:src/%=bin/%.exe)
        @echo $(dirs)
bin/%.exe:      src/%/*
        @echo "$@ <-- $^"

i know dirs is getting set properly

src/binA src/binB src/binC

this is the error i get

>make
make: *** No rule to make target `bin/binA.exe', needed by `all'.  Stop.

how can i make a generic rule that will properly expand its dependencies to be the contents of a subdir that is based on its name

Answer 1

i was able to get this to work by changing the rule matcher to bin/%.exe: $(wildcard src/%/*) and add a .SECONDARYEXPANSION: before that.