VHDL initialize variable to multiple values

In VHDL is it possible to sequentially assign values to a variable of type INTEGER? For example, I have a behavior file that has a matrix that loads value from a variable called DIN of type INTEGER. In the testbench I would think I need to assign values that DIN can have in which case I would need 8x8 values. How can I do so when my only inputs are DIN, CLK, and START?

Solution

I am assuming that the question can be interpreted as: "given a 2D array of integers, how can I initialize it one value at a time?"

If this is the case, here's a possible solution:

you will need two internal signals of integer type to index the array elements (say current_row and current_column)
you will need a reset signal to put your registers in a known state upon initialization (current_row, current_column, and your matrix elements should be set to 0 when reset is asserted)
on every clock pulse, assign the value from d_in to an element in your matrix: matrix(current_row, current_column) <= d_in
on every clock pulse, update current_row and current_column so that they cycle through the entire matrix in the correct order

The implementation details are left to the reader, but this should be enough to get you started.