I am simulation the LEON3 with modelsim. After a make vsim I get a do-file I use for calling modelsim. It gives me a warning message and I don't know if this message now is relevant. Actually I don't know what it means.
# ** Warning: [6] /path/to/lib/tech/ec/orca/orca.vhd(14744): (vcom-1288) VITAL timing generic "tpd_a1_s2" port specification "s2" does not denote a port.
The indicated code:
ENTITY fadsu2 IS
GENERIC(
TimingChecksOn : boolean := TRUE;
XOn : boolean := FALSE;
MsgOn : boolean := TRUE;
InstancePath : string := "fadsu2";
tpd_a0_bco : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_a1_bco : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_b0_bco : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_b1_bco : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_bci_bco : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_con_bco : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_a0_s0 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_a0_s1 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_a1_s0 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_a1_s1 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_a1_s2 : VitalDelayType01 := (0.001 ns, 0.001 ns); -- <--- here
tpd_b0_s0 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_b0_s1 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_b1_s0 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_b1_s1 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_bci_s0 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_bci_s1 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_con_s0 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tpd_con_s1 : VitalDelayType01 := (0.001 ns, 0.001 ns);
tipd_a0 : VitalDelayType01 := (0.0 ns, 0.0 ns);
tipd_a1 : VitalDelayType01 := (0.0 ns, 0.0 ns);
tipd_b0 : VitalDelayType01 := (0.0 ns, 0.0 ns);
tipd_b1 : VitalDelayType01 := (0.0 ns, 0.0 ns);
tipd_bci : VitalDelayType01 := (0.0 ns, 0.0 ns);
tipd_con : VitalDelayType01 := (0.0 ns, 0.0 ns));
PORT(
a0 : IN std_logic;
a1 : IN std_logic;
b0 : IN std_logic;
b1 : IN std_logic;
bci : IN std_logic;
con : IN std_logic;
bco : OUT std_logic;
s0 : OUT std_logic;
s1 : OUT std_logic);
ATTRIBUTE Vital_Level0 OF fadsu2 : ENTITY IS TRUE;
END fadsu2;
any sugestions?
I happened to have a copy of that source laying around. Comment out the offending line mentioning tpd_a1_s2
and it will compile.
Without modification:
david_koontz@Macbook: ghdl -a fadsu2.vhdl
fadsu2.vhdl:23:7:warning: 's2' is not a port name (in VITAL generic name)
Commenting out the offending generic:
david_koontz@Macbook: ghdl -a fadsu2.vhdl
david_koontz@Macbook:
And it analyzes. (I extracted the entity and architecture pair for fadsu2
from orca.vhd
)
The issue is that you have a tpd value (time propagation delay) specified between input a1
and output s2
(tpd_a1_s2
), where output port s2
is non-existent.