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why is assert capselled in an if checking the actual assertion in the IEEE lib?


While implementing a function "or" for a self defined array type, I decided to have a look at the implementation of "or" for std_logic_vector. There I stumbled over code like this:

(extract, I don't know if there is such a thing as copytright for this, since each vendor can have his own implementation).

funciton "or" (Left, Right: std_logic_vector) is
    ...
begin
    if Left'LENGTH /= Right'LENGTH then
        assert FALSE report
        "ErrorDifferentLengthVectors" severity failure;
    else
        ...
    end if;
end "or";

where is the advantage of this over using thecondition-part of thereport statement as follows? Won't the assertion cancel further compilation anyways or is there need to put the following code in an else branch?

funciton "or" (Left, Right: std_logic_vector) is
    ...
begin
    assert Left'LENGTH = Right'LENGTH report
    "ErrorDifferentLengthVectors" severity failure;

    ...

end "or";

Solution

  • It's a coding style thing. If you do it with assert you have to negate the condition. If you write multiple, exlusive elsifs you always have to invert that first condition in your head to work out which cases you already have covered in the if statement. At least that's why I do it in a simmilar fasion, but I ommit the assert all together and only use report ... severity failure;.

    An example would be the following snippets:
    A:

      signal value : natural := 0;
    
    begin  -- architecture beh
    
      -- purpose: none
      do_something : process (all) is
      begin  -- process to_something
        if rst = '0' then                   -- asynchronous reset (active low)
          value <= 0,
        elsif rising_edge(clk) then         -- rising clock edge
            assert value >= 10 and value <= 99  report "Value out of range." severity failure;
            if value < 15 then
              do something;
            elsif value > 20 and value < 50 then
              do some other thing;
            else
              do yet another thing;
            end if;
          end if;
      end process do_something;
    

    B:

       signal value : natural := 0;
    
    begin  -- architecture beh
    
      -- purpose: none
      do_something : process (all) is
      begin  -- process to_something
        if rst = '0' then                   -- asynchronous reset (active low)
          value <= 0,
        elsif rising_edge(clk) then         -- rising clock edge
            if value < 10 or value > 99 then
              report "Value out of range." severity failure;
            elsif value < 15 then
              do something;
            elsif value > 20 and value < 50 then
              do some other thing;
            else
              do yet another thing;
            end if;
          end if;
      end process do_something;
    

    It is harder to understand when which condition of Snipped A comes into play than it is in snipped B, especially the else clauses, and there is only one numeric value being checked in this example.