Search code examples
vhdl

Generic Records (vhdl2008)


I am striving to implement an entity whose ports depend on a generic package, which in turn depends in the generics of the entity. The trick is that I want to have a record for the ports.

At first I tried putting the record in a generic package and instantiate the generic package from the entity. (I did not start with records and asked a question regarding this).

The problem is that modelsim complains about the following order:

entity myEntity is
    generic()
    -- problem 1 package before port causes errors in modelsim
    package myInstance is new genericPackage generic map ...
    -- problem 2, "use" may appparently  not be used here
    port( p1 : in myInstance.genericRecord )
end entity;

is there an elegant way to solve this with the features of VHDL 2008?


Solution

  • As I understand it, the package instance has to come outside the entity. I don't think you can have the dependencies in the order you would like.

    The other approach to this sort of problem (think unconstrained vectors for example) is to "push things down" into entities on instantation. Could you use type generics like this?

    entity myEntity is
        generic (type myRecord);
        port (p1 : in myRecord);
    end entity;
    

    then when you instantiate it, you create the type you need:

    package myInstance is new genericPackage generic map ...
    ...
    inst:entity work.myEntity
      signal recordSig : myInstance.genericRecord;
    ...
      generic map (type => myInstance.genericRecord)
      port map (p1 => recordSig);