How to make sure interrupt can not be generated between specific Code Snippet?

I have one question about the timing of interrupt generation between code snippets...

@ "example" code

1. ...
2. assign value to global variable  // 0/1 means invalid/valid
3. set H/W register via memory-mapped IO method  // 0 means completed

@ "example" ISR code

a. ...
b. if(global value is valid && H/W register is "0") then count++;

One thing to note: After H/W register is set, its value will be 0 when "completion" !

My question is: if the interrupt is generated between 2 and 3, then count will be increased by one because step 3 is not done yet(value is 0)... And if exchange 2 and 3, then it is possible count will NOT be increased by 1 because even HW register is 0(after some time, completed) global variable is 0 !

My first idea is: is it possible 2 and 3 can be "tied together" in some way and interrupt is not allowed to be generated until 3 is done ?

I use watcom c and test in DOS...

Solution

You can use either inline assembly, or a call to an external function written in assembler, to invoke the x86 CLI and STI instructions for disabling and enabling interrupts.