Where is the "Zero divide" done in kernel for Arm Cortex A-9

Question

I am looking into kernel source code (2.6.35 ) for Zero divide .

I inserted Zero divide in user space program and all threads stopped.

So I want to know Where is the "Zero divide" done in kernel for Arm Cortex A-9?

I am not able to find any trap for this ....

Thanks

Answer 1

It depends on the architecture. Given the following user space code on an x86 system:

main() {                                                                                                                                                                             
   int x = 42 / 0;                                                                                                                                                                   
}                                                                                                                                                                                    

the compiler inserts a idivl command into the object code. When this command is executed with a divisor of 0, the CPU generates a division by zero trap (similar to an interrupt). This calls the divide_error trap handler inside the kernel, in case of x86 it is located in arch/x86/kernel/entry_32.S:

ENTRY(divide_error)
        RING0_INT_FRAME
        pushl_cfi $0                    # no error code
        pushl_cfi $do_divide_error
        jmp error_code
        CFI_ENDPROC
END(divide_error)

The error_code target then takes care of all necessary actions to handle the error and finally returns from the trap.

---

On ARM, things are different: With a few exceptions, ARM CPUs do not have a hardware division instruction (e.g. Arm Cortex A-9 does not have one). Division needs to be implemented as a library function. For the kernel, this is implemented in arch/arm/lib/lib1funcs.S where you also find the division by zero handling. For user space applications, I suppose this is implemented as a library function in the libgcc library.