Do the ARM instructions ldrex/strex have to operate on cache aligned data?

Question

On Intel, the arguments to CMPXCHG must be cache line aligned (since Intel uses MESI to implement CAS).

On ARM, ldrex and strex operate on exclusive reservation granuales.

To be clear, does this then mean on ARM the data being operated upon does not have to be cache line aligned?

Answer 1

It says so right in the ARM Architecture Reference Manual A.3.2.1 "Unaligned data access". LDREX and STREX require word alignment. Which makes sense, because an unaligned data access can span exclusive reservation granules.