I am looking for some examples of hash table implementation (insertions + lookups) in Verilog (VHDL will work too). My case is not very complicated because I know all of the values on initialization time, thus I can pretty much tell how much memory I will need, know its boundaries etc. The hash function part is not hard, and I have an idea of how to map the hash key to memory addresses, manage collisions etc. But writing all this for the first time from scratch is resource consuming and there could be gotchas I don't know about. It would help if I could use some reference design. So if you know about such thing - please share. Both fee/paid are OK, I could buy an IP implementing this if it comes with a source code I can use to learn.
You probably want a CAM or Content Addressable Memory, but it really depends on the problem you're trying to solve. CAMs tend to be expensive in terms of logic, and fan-out of the read path. When used they tend to be small.
To be honest it sounds like you're thinking in software terms for a hardware problem. A hash table is not something you generally see in hardware.